A conventional CMI data synchronizing circuit decodes the CMI data to the NRZ data by means of an open loop retiming circuit wherein the transition of a clock pulse extracted from data is manually adjusted to be produced at the center of the unit bit interval of the CMI data. As a result, the transition of the clock pulse extracted from the CMI data can not be produced automatically at the center of the unit interval of the CMI data. Also, in decoding the CMI data to the NRZ data by use of the clock pulse extracted from the CMI data, because the phases of rising or falling transitions of the extracted clock pulse should be always constant relative to the transition of the CMI data, a phase margin of the extracted clock pulse is within 180 degrees. Accordingly, for retiming the data, a accurate phase compensation circuit is required. However, because a conventional CMI/NRZ decoding and retiming circuit largely depends upon the accuracy and the temperature characteristics of the constituting elements, several problems are caused. In addition, in the case of utilizing the recently developed self-adjusting retiming circuit wherein bit syncronization of the CMI data is implemented by mean of a clock pulse produced by VCO(Voltage Controlled Oscillator), it is disadvantageous that the period of the clock pulse used should be equivalent to the unit bit interval of the CMI data.